ATmega328P¶

Central Controller

Overview¶

The ATmega328P serves as the central controller of REVA.

It executes all firmware tasks and contains the timer resources responsible for waveform synthesis.

Internal Responsibilities¶

ATmega328P
    │
    ├── Timer1
    │       Carrier Engine
    │
    ├── Timer2
    │       Packet Scheduler
    │
    ├── EEPROM
    │       Configuration Storage
    │
    ├── GPIO
    │       User Interface
    │
    └── I²C
            OLED Display

Clock Frequency¶

16 MHz

All timing derives from the system clock.

Deterministic operation depends on this fixed reference.

Memory Resources¶

Resource	Size
Flash	32 kB
SRAM	2 kB
EEPROM	1 kB

Role Inside REVA¶

The processor performs:

packet execution,
operator interaction,
display updates,
EEPROM management,
interrupt handling.

Critical timing remains isolated inside dedicated timer domains.