Parallel Tank: \(C \parallel (R+L)\)
The satisfying part: anti-resonance (impedance peak), circulating reactive currents, and clean pulse intuition
This topology is a “voltage-driven parallel tank”:
the source voltage \(v(t)\) is applied across both branches and the source current splits.
Its signature behavior is not a current peak (series RLC) — it is an impedance peak (anti-resonance).
Topology definition.
A capacitor \(C\) is in parallel with a series branch \(R+L\). The same voltage appears across both:
\[
v_C(t)=v(t),\qquad v_{RL}(t)=v(t)
\]
Branch currents:
\[
i_{src}(t)=i_{RL}(t)+i_C(t)
\]
1) One sentence intuition (the correct “mental picture”)
- Capacitor current follows edge speed: \(i_C=C\,dv/dt\) → fast edges create large \(i_C\).
- RL branch current follows \(\tau=L/R\): it cannot jump instantly; it ramps exponentially.
- At anti-resonance: the reactive part of \(i_{RL}\) cancels \(i_C\) in the sum \(i_{src}=i_{RL}+i_C\) → the source mainly supplies the resistive loss.
Why this feels “different” than series RLC.
Series resonance gives a current maximum. Parallel anti-resonance gives a source current minimum (impedance maximum) —
while still allowing large internal circulating reactive currents.
2) Sine excitation (the right tool is admittance)
Parallel networks are easiest in admittance:
\[
I_{src}=V\cdot Y
\]
Branch admittances
\[
Z_{RL}=R+j\omega L,\qquad
Y_{RL}=\frac{1}{Z_{RL}}=\frac{R-j\omega L}{R^2+(\omega L)^2}
\]
\[
Y_C=j\omega C
\]
\[
Y=Y_{RL}+Y_C
\]
Anti-resonance condition: \(\operatorname{Im}(Y)=0\)
The “magic point” is when net susceptance is zero:
\[
\operatorname{Im}(Y)=0
\]
\[
\Rightarrow\ \omega C-\frac{\omega L}{R^2+(\omega L)^2}=0
\]
\[
\Rightarrow\ \omega^2=\frac{1}{LC}-\frac{R^2}{L^2}
\]
What this means physically.
At this frequency, the capacitor draws a leading reactive current while the RL branch provides a lagging reactive component.
They cancel in the vector sum \(I_{src}=I_{RL}+I_C\), so the source sees (almost) pure conductance.
Impedance peak (why it’s satisfying)
At anti-resonance, the total admittance becomes (approximately) real:
\[
Y(\omega_{ar}) \approx G(\omega_{ar})=\frac{R}{R^2+(\omega_{ar}L)^2}
\]
so the equivalent impedance peak is:
\[
|Z_{eq}(\omega_{ar})|\approx \frac{1}{G}=\frac{R^2+(\omega_{ar}L)^2}{R}
\]
That can be much larger than \(R\), which is why the source current becomes small even though branch currents can be large.
What you should look for in the simulator (sine)
- Source current dip near \(\omega_{ar}\) (impedance peak / anti-resonance).
- Phase near 0° at anti-resonance (PF improves).
- Reactive circulation: internal reactive power can be large while net \(Q\) drawn from source is small.
3) Pulse excitation (edges + slow branch)
In pulse mode, the capacitor voltage is clamped by the source:
\[
v_C(t)=v(t)
\]
Therefore the capacitor current is entirely determined by the voltage edge shape:
\[
i_C(t)=C\frac{dv}{dt}
\]
Do not use ideal steps for intuition.
An ideal step has \(dv/dt\to\infty\) (impulse current). Real edges have finite rise time \(t_r\).
A good lab estimate is:
\[
i_{C,peak}\approx C\frac{\Delta V}{t_r}
\]
RL branch under pulses
The RL branch follows the same first-order dynamic as the pure RL case, driven by the same \(v(t)\):
\[
L\frac{di_{RL}}{dt}+R\,i_{RL}=v(t),\qquad \tau=\frac{L}{R}
\]
So you get:
- fast edge → capacitor takes the hit
- slow interval → RL branch current moves toward its segment target
What you should look for in the simulator (pulse)
- Edge packet in \(i_C\) (shape follows rise/fall time).
- Slow exponential in \(i_{RL}\) with time constant \(\tau\).
- Source current is the sum \(i_{src}=i_C+i_{RL}\): spikes + slow pedestal.
4) Worked examples (replicable in the simulator)
The simulator does not expose a separate “edge rise time” parameter, so the worked examples below avoid any
\(t_r\)-based peak-current claims and instead focus on things you can set and verify directly:
frequency, L/C/R totals, phase angle, P/Q/S/PF, and the impedance peak (“anti-resonance”) behavior.
Example A — Sine anti-resonance (impedance peak + PF improvement)
Simulator setup
- Topology: Parallel (R+L) ∥ C (shown as “C ∥ (R+L)”)
- Excitation: Sine
- Set component values:
- \(L = 10\,\text{mH}\)
- \(C = 10\,\mu\text{F}\)
- Set total series resistance of the RL branch to \(R = 1\,\Omega\). If your UI has Rcoil and Rload,
use e.g. \(R_{coil}=0.2\,\Omega\), \(R_{load}=0.8\,\Omega\) so \(R_{total}=1\,\Omega\).
- Source amplitude: any fixed value is fine (e.g. \(V_{pk}=10\,\text{V}\)) because \(f_{ar}\) does not depend on amplitude.
Prediction (frequency)
Parallel anti-resonance (net susceptance zero) occurs when:
\[
\omega_{ar}^2=\frac{1}{LC}-\frac{R^2}{L^2}
\]
For \(L=10\,\text{mH}\), \(C=10\,\mu\text{F}\), \(R=1\,\Omega\):
\[
\omega_{ar}=\sqrt{10^7-10^4}=3160.70\,\text{rad/s}
\qquad\Rightarrow\qquad
f_{ar}=\frac{\omega_{ar}}{2\pi}=503.04\,\text{Hz}
\]
What to verify in the simulator
- Sweep sine frequency around 450 → 600 Hz. You should find a point very close to 503 Hz where:
- Source current magnitude is minimal (impedance peak / anti-resonance).
- Phase angle (or PF) moves toward 0° / PF → 1 near that point (net reactive draw cancels).
- Below \(f_{ar}\) the simulator reports net inductive behavior (\(Q>0\), \(\phi>0^\circ\)). Above \(f_{ar}\) it reports net capacitive behavior (\(Q<0\), \(\phi<0^\circ\)).
Why this is the “parallel wow moment”.
Series resonance gives a current maximum. Parallel anti-resonance gives a source current minimum.
So the correct “success criterion” here is a dip in source current + PF improvement near \(f_{ar}\).
Example B — Sine detuning: sign flip of reactance around the peak
Simulator setup: keep the same values as Example A.
Do this
- Set \(f = 429\,\text{Hz}\) and note the displayed \(\phi\) (or PF) and the sign of \(Q\).
- Set \(f = 503\,\text{Hz}\) and note \(\phi\) (or PF) and \(Q\) again.
- Set \(f = 600\,\text{Hz}\) and compare.
What should happen (matches the simulator)
- Below \(f_{ar}\): net behavior tends to look more inductive (\(Q>0\), \(\phi>0^\circ\) in the simulator).
- Near \(f_{ar}\): net reactive draw cancels (\(Q \approx 0\), \(\phi \approx 0^\circ\), PF close to 1).
- Above \(f_{ar}\): net behavior tends to look more capacitive (\(Q<0\), \(\phi<0^\circ\) in the simulator).
Sign convention note (important).
Use the simulator’s Q sign as the authoritative indicator:
\(Q>0\) → net inductive, \(Q<0\) → net capacitive.
The displayed phase \(\phi\) follows the same convention shown in the UI.
Replicable check.
You do not need internal branch-current probes to validate this topology. The sign flip of \(Q\) and the PF peak around \(f_{ar}\)
is an external, instrument-style validation that the admittance cancellation is happening.
Example C — Pulse train: isolate the RL time constant inside the parallel network
Pulse mode in this topology can look “less clean” than series RLC because the capacitor branch reacts instantly to changes in \(v(t)\).
Instead of chasing edge peaks, the replicable check is: the slow envelope in current is still governed by \(\tau=L/R\).
Simulator setup
- Topology: Parallel (R+L) ∥ C
- Excitation: Pulse train
- Use the same component values as Example A, and choose:
- Pulse amplitude: e.g. \(V=10\,\text{V}\)
- Repetition frequency: \(f=200\,\text{Hz}\) \(\Rightarrow T=5\,\text{ms}\)
- Duty: \(D=50\%\) \(\Rightarrow T_{on}=2.5\,\text{ms}\)
Prediction
The RL branch time constant is:
\[
\tau=\frac{L}{R}=\frac{10\,\text{mH}}{1\,\Omega}=10\,\text{ms}
\]
Since \(T=5\,\text{ms} < \tau\), the “slow” part of the waveform cannot fully rise or decay within one cycle.
So you should observe a gentle exponential envelope (limited change per period).
What to verify in the simulator
- Keep \(L\) fixed and double \(R\) (e.g. from 1 Ω → 2 Ω): \(\tau\) halves, so the slow envelope should move faster.
- Keep \(R\) fixed and double \(L\): \(\tau\) doubles, so the slow envelope should move slower.
- This check is stable and replicable regardless of how sharp the UI’s pulse edges are.
Key idea.
In parallel \(C \parallel (R+L)\), the capacitor branch explains “fast” behavior and the RL branch explains “slow” behavior.
If your simulator shows the correct \(\tau\)-scaling when you vary \(L\) or \(R\), the model is behaving correctly.
5) Why this model is “safe” in the RLC Analyzer
- Voltage across C is not a free state here; it is directly \(v(t)\). That removes a common source of “numerical weirdness”.
- Sine behavior is fully analytic in admittance form and anti-resonance is a single clean condition \(\operatorname{Im}(Y)=0\).
- The key observable is impedance peak, not current peak — and the simulator exposes net PQ behavior directly.
- Pulse behavior has a physically correct split: edge behavior lives in \(i_C=C\,dv/dt\), slow behavior lives in \(\tau=L/R\).
Practical takeaway.
If you can confirm (1) a source current dip near \(f_{ar}\), (2) PF peak / \(\phi\to 0^\circ\) there,
and (3) the correct sign flip of \(Q\) across \(f_{ar}\), then you have robust parallel-tank intuition and a strong reason to trust the simulator here.
Back to: RL · Series RLC · Mathematical Foundations
RL Circuit (Series R–L)
Time constant \(\tau=L/R\), phase lag under sine excitation,
pulse response, energy in magnetic field \(\tfrac12Li^2\),
and step-by-step worked examples.
Open RL Guide →
Series RLC (R–L–C in Series)
Resonance \(\omega_0=1/\sqrt{LC}\), damping ratio,
ringing under pulses, reactive power flow,
and resonance verification inside the simulator.
Open Series RLC Guide →
Parallel Tank C ∥ (R+L)
Admittance view, anti-resonance \(\operatorname{Im}(Y)=0\),
impedance peak, reactive current cancellation,
and pulse behavior in voltage-driven parallel networks.
Open Parallel Tank Guide →