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Diode Plug Explained

Diode‑Plug Energy Extraction from a Resonant AC Source

This section describes the diode‑plug topology and derives the main formulae for voltages, currents, energies, and powers, using standard circuit theory [1].

Circuit Topology

Fig. 1 – Diode Plug.

We consider an AC (or resonant) source \(v_s(t)\) with terminals \(A\) and \(B\), feeding two rectifying branches that create a split DC bus:

  • Branch 1 (positive rail): \(A \rightarrow C_1 \rightarrow P \rightarrow D_1 \rightarrow B\)
  • Branch 2 (negative rail): \(A \rightarrow C_2 \rightarrow N \rightarrow D_2 \rightarrow B\)

A load \(R_L\) is connected between nodes \(P\) and \(N\).

Node voltages (with \(v_B(t) = 0\)):

\(v_A(t) = v_s(t),\quad v_P(t),\quad v_N(t).\)

Capacitor voltages:

\( v_{C_1}(t) = v_A(t) - v_P(t), \quad v_{C_2}(t) = v_A(t) - v_N(t). \)

Capacitor currents:

\( i_{C_1}(t) = C_1 \frac{\mathrm{d}v_{C_1}}{\mathrm{d}t}, \quad i_{C_2}(t) = C_2 \frac{\mathrm{d}v_{C_2}}{\mathrm{d}t}. \)

Energies stored in the capacitors:

\( E_{C_1}(t) = \frac{1}{2} C_1 v_{C_1}^2(t), \quad E_{C_2}(t) = \frac{1}{2} C_2 v_{C_2}^2(t). \)

For a resonant or sinusoidal source we assume:

\( v_s(t) = \hat{V}_s \sin(\omega t), \quad \omega = 2\pi f, \quad T = \frac{2\pi}{\omega}. \)

Diode Conduction Conditions

Diode voltages (ideal diodes):

\( v_{D_1}(t) = v_P(t) - v_B(t) = v_P(t), \quad v_{D_2}(t) = v_N(t) - v_B(t) = v_N(t). \)

Conduction conditions:

\( \begin{aligned} v_{D_1}(t) > 0 &\Rightarrow D_1 \text{ ON},\ v_{D_1}(t)=0,\ i_{D_1}(t)\ge 0, \quad v_{D_1}(t) < 0 \Rightarrow D_1 \text{ OFF},\ i_{D_1}(t)=0 \\[6pt] v_{D_2}(t) > 0 &\Rightarrow D_2 \text{ ON},\ v_{D_2}(t)=0,\ i_{D_2}(t)\ge 0, \quad v_{D_2}(t) < 0 \Rightarrow D_2 \text{ OFF},\ i_{D_2}(t)=0 \end{aligned} \)

Whenever a diode turns ON, charge is transferred from the source (or resonant tank) into the corresponding capacitor.

Steady‑State Capacitor Voltages (No Load)

With no load connected (\(R_L \to \infty\)) and after transients, each capacitor charges approximately to the peak source voltage magnitude (half‑wave rectification):

\( V_{P,\text{ss}} \approx \hat{V}_s,\quad V_{N,\text{ss}} \approx \hat{V}_s. \)

Steady‑state energies:

\( E_{C_1,\text{ss}} \approx \frac{1}{2} C_1 \hat{V}_s^2, \quad E_{C_2,\text{ss}} \approx \frac{1}{2} C_2 \hat{V}_s^2. \)

Total:

\( E_{\text{stored}} \approx \frac{1}{2} (C_1 + C_2) \hat{V}_s^2. \)

If we define a total capacitance \(C_s = C_1 + C_2\), then:

\( E_{\text{stored}} \approx \frac{1}{2} C_s \hat{V}_s^2. \)

Thus, splitting into two capacitors does not change the total stored energy; it only redistributes it between nodes \(P\) and \(N\) [1].

Load Voltage and Power

With a load \(R_L\) connected between \(P\) and \(N\), the instantaneous load voltage and current are:

\( v_L(t) = v_P(t) - v_N(t), \quad i_L(t) = \frac{v_L(t)}{R_L}. \)

Instantaneous load power:

\( p_L(t) = v_L(t)\,i_L(t) = \frac{v_L^2(t)}{R_L}. \)

Average (real) power over one period \(T\):

\( P_L = \frac{1}{T}\int_0^T p_L(t)\,\mathrm{d}t = \frac{1}{T R_L} \int_0^T v_L^2(t)\,\mathrm{d}t. \)

Single‑Pulse Discharge of One Capacitor

If capacitor \(C_1\) is pre‑charged to \(V_{P0}\) and then discharged into \(R_L\) (with \(N\) held at 0 V for the duration of the pulse), the classic RC discharge equations are:

\( v_P(t) = V_{P0} e^{-t/(R_L C_1)}, \quad i_L(t) = \frac{V_{P0}}{R_L} e^{-t/(R_L C_1)}. \)

Instantaneous power:

\( p_L(t) = \frac{V_{P0}^2}{R_L} e^{-2t/(R_L C_1)}. \)

Energy delivered to the load in this pulse:

\( \begin{aligned} E_L &= \int_0^\infty p_L(t)\,\mathrm{d}t \\ &= \frac{V_{P0}^2}{R_L} \int_0^\infty e^{-2t/(R_L C_1)} \mathrm{d}t \\ &= \frac{V_{P0}^2}{R_L} \left(\frac{R_L C_1}{2}\right) = \frac{1}{2} C_1 V_{P0}^2. \end{aligned} \)

This equals the initial stored energy:

\( E_L = \Delta E_{C_1} = \frac{1}{2} C_1 V_{P0}^2. \)

If such pulses occur at repetition frequency \(f_p\), the average power contributed by capacitor \(C_1\) is:

\( P_{L,1} = f_p \cdot \frac{1}{2} C_1 V_{P0}^2. \)

For symmetric operation with \(C_1 = C_2 = C_s/2\) and \(V_{P0} = V_{N0} = \hat{V}_s\) (and both capacitors discharged alternately at the same \(f_p\)):

\( P_{L,\text{total}} = f_p \cdot \frac{1}{2} C_s \hat{V}_s^2. \)

Energy Balance and Equivalent Load Seen by the Source

Let

  • \(P_{\text{in}}\): average real power drawn from the AC source,
  • \(P_L\): average power delivered to the load,
  • \(P_{\text{loss}}\): total losses (conduction, ESR, switching, etc.).

Energy conservation implies:

\( P_{\text{in}} = P_L + P_{\text{loss}}. \)

From the source’s perspective, the diode‑plug plus load can be modeled as an equivalent resistance \(R_{\text{eq}}\) (at the fundamental frequency) such that:

\( P_{\text{in}} \approx \frac{V_{\text{rms}}^2}{R_{\text{eq}}}, \)

where \(V_{\text{rms}}\) is the RMS value of \(v_s(t)\) at the connection point [1].

If the AC source is actually the output of a resonant tank with inductance \(L\) and effective tank capacitance \(C_{\text{tank}}\), the resonant frequency and loaded \(Q\) are approximately:

\( \omega_0 = \frac{1}{\sqrt{L C_{\text{tank}}}}, \quad Q \approx \frac{\omega_0 L}{R_{\text{loss}} + R_{\text{eq}}}. \)

By designing the diode‑plug such that

\( \Delta E_{\text{extract per cycle}} \ll E_{\text{tank}}, \)

the disturbance of the resonant waveform is minimized and the plug behaves as a weak, quasi‑constant load on the resonant system.

Below is an additional section you can append directly to the previous “technical paper.” It is written so an EE can drop it into a document with minimal editing.


Apparent Negative Resistance and Equivalent Admittance of the Diode‑Plug

When the diode‑plug is connected to a resonant AC node and the system is observed from the AC side, measurements may show that the plug behaves as if it had an effective negative resistance. This section explains that behavior and shows how to model the plug as an equivalent admittance \( Y_{\text{eq}} = G + jB\) at the fundamental frequency of the AC node.

Definition of equivalent admittance at the fundamental

Let the voltage and current at the AC node (between terminals A and B) be:

  • Instantaneous: \( v_s(t),\quad i_s(t) \)
  • Fundamental phasors: \( V_1,\quad I_1 \) obtained, for example, by FFT of \(v_s(t)\) and \(i_s(t)\) and extracting the components at \(\omega_0\).

The equivalent admittance of the diode‑plug, referred to the fundamental, is defined as: \( Y_{\text{eq}} = \frac{I_1}{V_1} = G + jB \) where:

  • \(G\) is the conductance (real part),
  • \(B\) is the susceptance (imaginary part).

The corresponding equivalent impedance is: \( Z_{\text{eq}} = \frac{1}{Y_{\text{eq}}} = R_{\text{eq}} + jX_{\text{eq}} \) with \(R_{\text{eq}} = 1/G\) if \(G\neq 0\).

Relation to measured active and reactive power

The complex power associated with the fundamental components is: \( S_1 = P_1 + jQ_1 = V_1 I_1^* \)

Then: \( P_1 = \Re\{V_1 I_1^*\} = |V_1|^2 G, \qquad Q_1 = \Im\{V_1 I_1^*\} = |V_1|^2 B \)

So the equivalent conductance and susceptance can be obtained directly from measured fundamental power:

\( G = \frac{P_1}{|V_1|^2},\qquad B = \frac{Q_1}{|V_1|^2} \)

If a power analyzer reports active power \(P\) and reactive power \(Q\) already filtered to the fundamental, then \(P_1 \approx P\) and \(Q_1 \approx Q\).

  • Positive \(G\) → plug behaves as a normal load (positive resistance).
  • Negative \(G\) → plug behaves as an active source at the fundamental (negative resistance).
  • Positive \(B\) → plug appears inductive.
  • Negative \(B\) → plug appears capacitive.

In many practical diode‑plug configurations, the plug appears as negative \(G\) and negative \(B\): an active subsystem with capacitive character.

Mechanism leading to negative conductance

The diode‑plug is a strongly nonlinear, time‑varying element:

  1. Charging intervals
    During parts of the AC cycle, the diodes conduct and the capacitors \(C_1\), \(C_2\) absorb energy: \( p(t) = v_s(t)i_s(t) > 0 \) Energy flows from the AC node into the plug.

  2. Discharging / return intervals
    At other times—depending on downstream circuitry, stored voltages, and switching—the capacitors can return energy toward the AC node (e.g., by driving current in the opposite direction to the instantaneous source voltage). In those intervals: \( p(t) = v_s(t)i_s(t) < 0 \)

  3. Net effect over a period
    If, over one fundamental period \(T\), \( P_1 = \frac{1}{T}\int_0^T v_s(t)\,i_s(t)\,dt < 0 \) then, at the fundamental, the plug is delivering net real energy to the AC node rather than consuming it.

This is mathematically equivalent to a negative conductance: \( G = \frac{P_1}{|V_1|^2} < 0,\qquad R_{\text{eq}} = \frac{1}{G} < 0 \)

The origin of that energy is the stored energy in the capacitors and any connected downstream circuitry (batteries, DC bus, etc.). From the AC node perspective, such a subsystem is indistinguishable from an active source while it is discharging.

Susceptance and the role of added capacitance

The diode‑plug also exchanges significant reactive energy with the resonant tank. The instantaneous reactive energy in its capacitors is:

\( E_{\text{C,tot}}(t) = \frac{1}{2}C_1 v_P^2(t) + \frac{1}{2}C_2 v_N^2(t) \)

The larger the capacitances \(C_1, C_2\):

  • The larger the energy swing \(\Delta E_{\text{C,tot}}\) per cycle, and
  • The larger the associated reactive current components at \(\omega_0\).

At the fundamental, this is captured by the susceptance \(B\). Roughly:

  • Increasing total effective capacitance makes \(B\) more negative (more capacitive).
  • As the magnitude of the energy swings grows, the waveform distortion and timing asymmetries can also increase the (negative) value of \(G\).

Hence in measurements:

  • The magnitude of reactive power \(|Q_1| = |V_1|^2 |B|\) increases with added capacitance.
  • The magnitude of negative active power \(|P_1|\) may also increase, because larger stored energy allows larger bursts of power to be returned toward the AC node during parts of the cycle.

Extraction procedure for G and B from measurement data

An engineer can determine \(G\) and \(B\) experimentally as follows:

  1. Measure the instantaneous voltage and current at the AC node, \(v_s(t)\) and \(i_s(t)\), with sufficient bandwidth and sampling rate (e.g., ≥ 20× the fundamental frequency).

  2. Over an integer number of fundamental periods \(T\), compute the complex Fourier coefficient at \(\omega_0\) for each: \( V_1 = \frac{2}{T}\int_0^T v_s(t)e^{-j\omega_0 t}\,dt, \quad I_1 = \frac{2}{T}\int_0^T i_s(t)e^{-j\omega_0 t}\,dt \)

  3. Compute: \( Y_{\text{eq}} = \frac{I_1}{V_1} = G + jB \)

  4. Check consistency with power: \( P_1 = \Re\{V_1 I_1^*\},\quad Q_1 = \Im\{V_1 I_1^*\} \) and verify: \( G = \frac{P_1}{|V_1|^2},\quad B = \frac{Q_1}{|V_1|^2} \)

This yields a linear, sinusoidal‑equivalent model of the nonlinear diode‑plug as seen from the AC node at the fundamental frequency.

Use in resonant‑tank modeling

Once \(G\) and \(B\) are known, the diode‑plug can be included in small‑signal resonant analysis simply as an admittance in parallel (or converted to a series form) with the tank:

  • Effective parallel admittance at the tank node: \( Y_{\text{tank,tot}} = G_{\text{loss}} + jB_{\text{tank}} + Y_{\text{eq}} \)

  • Loaded Q and damping can then be evaluated using standard formulas. For example, in a series‑equivalent representation, the effective series resistance becomes: \( R_{\text{series,eff}} = \frac{\omega_0^2 L^2 G}{1 + (\omega_0 L B)^2} \) and the corresponding loaded quality factor: \( Q_{\text{loaded}} \approx \frac{\omega_0 L}{R_{\text{series,eff}}} \) (for modest \(B\); more exact relationships can be derived if needed).

If \(G < 0\) and \(|G|\) is large enough to overcome other losses, the net effect is negative damping of the tank (possibility of self‑oscillation or instability). In practice, stability must be evaluated carefully whenever the diode‑plug operates in a regime where it presents a substantial negative conductance to the resonant network.


This section gives EEs a standard, power‑system‑style way to think about and model the diode‑plug: as a nonlinear element whose effect at the fundamental can be summarized by an equivalent admittance \(Y_{\text{eq}} = G + jB\), often with negative \(G\) and capacitive \(B\) in the regimes you are interested in.


Author: René Meschuh, 2023-04-23